TY  - CONF

T1  - Modelling framework for parallel SiC power MOSFETs chips in modules developed by planar technology

JO  - 2018 IEEE International Conference on Electrical Systems for Aircraft, Railway, Ship Propulsion and Road Vehicles & International Transportation Electrification Conference (ESARS-ITEC)

UR  - https://eprints.whiterose.ac.uk/id/eprint/140191

PY  - 2019/01/14

AU  - Kamel T

AU  - Griffo A

AU  - Wang J

ED  - 

DO  - DOI: 10.1109/ESARS-ITEC.2018.8607625

PB  - IEEE

SN  - 978-1-5386-4192-7

Y2  - 2025/11/10

ER  -