TY  - JOUR

T1  - Throughput/Area-efficient ECC Processor Using Montgomery Point Multiplication on FPGA

JO  - IEEE Transactions on Circuits and Systems II: Express Briefs

UR  - https://doi.org/10.1109/TCSII.2015.2455992

PY  - 2015/07/13

AU  - Khan Z

AU  - Benaissa M

ED  - 

DO  - DOI: 10.1109/TCSII.2015.2455992

PB  - Institute of Electrical and Electronics Engineers

VL  - 62

IS  - 11

SP  - 1078

EP  - 1082

Y2  - 2025/11/13

ER  -